An Automatic Gain Control topology for CMOS digital radio receiver
Automatic Gain Control (AGC) is an integral part of any radio receiver. It is needed to maintain the signal level within an acceptable range that would yield the best possible SNR at the receiver output. In this paper, an AGC topology that was used for a CMOS, OFDM-based, digital radio receiver is i...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Tagungsbericht |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | Automatic Gain Control (AGC) is an integral part of any radio receiver. It is needed to maintain the signal level within an acceptable range that would yield the best possible SNR at the receiver output. In this paper, an AGC topology that was used for a CMOS, OFDM-based, digital radio receiver is introduced. The basic AGC algorithm is summarized. The AGC works on two stages, the RF stage and the baseband stage. Because the receiver is implemented in CMOS, the granularity of gain change of the signal path was in rather large steps. The AGC algorithm had to support such signal path with a mechanism to ensure limited gain jumps to avoid disrupting the OFDM operation. The algorithm stability is mathematically verified and confirmed via computer simulations. |
---|---|
ISSN: | 0271-4302 2158-1525 |
DOI: | 10.1109/ISCAS.2009.5118192 |