Characterization and modeling of the power delivery networks of memory chips

This paper focuses on the power delivery characterization of high-speed IC memories by means of on-chip measurements. A systematic analysis of the measurement setup, of the effects of chip biasing and of the use of the measured responses to develop models defined by simplified circuit equivalents is...

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Hauptverfasser:	Stievano, I.S., Maio, I.A., Rigazio, L., Canavero, F.G., Izzi, R., Girardi, A., Lessio, T., Conci, A., Cunha, T., Teixeira, H., Pedro, J.C.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Fixtures Flash memory High speed integrated circuits Integrated circuit interconnections Integrated circuit measurements Integrated circuit modeling Integrated circuit packaging Power measurement Power system modeling Semiconductor device measurement
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Beschreibung
Zusammenfassung:	This paper focuses on the power delivery characterization of high-speed IC memories by means of on-chip measurements. A systematic analysis of the measurement setup, of the effects of chip biasing and of the use of the measured responses to develop models defined by simplified circuit equivalents is given. All the results collected in the paper are based on real measurements carried out on a commercial 90 nm flash memory.
DOI:	10.1109/SPI.2009.5089835