Towards real-time implementation of coherent optical communication
We outline the hardware architecture of coherent optical receivers supporting Gt40 Gb/s data rates and extract constraints for compatible signal processing algorithms. Additionally a chipset layout for a 40 Gb/s digital coherent polarization-multiplexed QPSK receiver is presented.
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Hauptverfasser: | , , , , , , , |
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Format: | Tagungsbericht |
Sprache: | eng ; jpn |
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Zusammenfassung: | We outline the hardware architecture of coherent optical receivers supporting Gt40 Gb/s data rates and extract constraints for compatible signal processing algorithms. Additionally a chipset layout for a 40 Gb/s digital coherent polarization-multiplexed QPSK receiver is presented. |
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DOI: | 10.1364/OFC.2009.OThJ4 |