A 2Gb/s 15pJ/b/chip Inductive-Coupling programmable bus for NAND Flash memory stacking

A wireless communication technique, which enables a controller chip to communicate with random access with a stack underneath it of 64 NAND flash memory chips at a data rate of 2 Gb/s using relayed transmission is developed. This technique can be applied to memory access in solid-state drives (SSD). The wireless interface allows the removal of a highly capacitive ESD protection device and results in a 2times reduction in power consumption, and a 40times reduction in I/O circuit-layout area. Using bonding wires for the power supply and wireless interface for data access reduces the number of bonding wires in the 64-chip stack from over 1,500 wires to less than 200 wires. This reduction in the number of bonding wires makes it possible to integrate 64 chips in one package, which conventionally requires eight separate packages. This wireless interface is based on inductive coupling between inductors on the stacked chips. The inductors emit magnetic field both upwards and downwards. This creates both intentional and unintentional communication link, which makes it difficult to be used in homogeneous stacking. Our technique enables data delivery upwards and downwards for memory read and write with measured BER < 10 -12 . Power reduction is achieved by proper state programming of individual chips.