Combined effect of grain boundary depletion and PolySi/Oxide interface depletion on drain characteristics of a p-MOSFET

The effect of poly depletion on the drain characteristics of a ULSI p-MOSFET has been studied using a 2D-device simulator MEDICI/sup TM(1)/. The combined effect of both grain boundary depletion and PolySi/Oxide interface depletion at the polysilicon gate on the drain characteristics is described. The MOSFET parameters considered for analysis were the threshold voltage, drive current and subthreshold slope. It is found that a smaller grain size, lower carrier concentration in polysilicon and higher trap density at grain boundaries increase the grain boundary depletion effects on the drain characteristics.