An incremental PGA architecture for STBC MIMO decoding
Space-time block codes (STBC) are desirable for use in multiple-input multiple-output (MIMO) communications systems because they can be decoded using only linear computations involving multiplication and addition. However, the number of simple operations and storage required may not be trivial for p...
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| creator | Colavito, L. Silage, D. |
| description | Space-time block codes (STBC) are desirable for use in multiple-input multiple-output (MIMO) communications systems because they can be decoded using only linear computations involving multiplication and addition. However, the number of simple operations and storage required may not be trivial for practical applications. This paper describes a method of implementing STBC MIMO decoding in programmable gate array (PGA) hardware using an incremental approach that reduces resource and storage requirements as compared to a direct implementation. A three antenna rate-frac12 STBC code is used as an example, but the techniques are readily applicable to other codes. |
| doi_str_mv | 10.1109/SARNOF.2009.4850286 |
| format | Conference Proceeding |
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However, the number of simple operations and storage required may not be trivial for practical applications. This paper describes a method of implementing STBC MIMO decoding in programmable gate array (PGA) hardware using an incremental approach that reduces resource and storage requirements as compared to a direct implementation. A three antenna rate-frac12 STBC code is used as an example, but the techniques are readily applicable to other codes.</description><identifier>ISBN: 9781424433810</identifier><identifier>ISBN: 1424433819</identifier><identifier>EISBN: 1424433827</identifier><identifier>EISBN: 9781424433827</identifier><identifier>DOI: 10.1109/SARNOF.2009.4850286</identifier><identifier>LCCN: 2008910000</identifier><language>eng</language><publisher>IEEE</publisher><subject>Additive white noise ; Block codes ; Communication channels ; Computer architecture ; Electronics packaging ; Equations ; Maximum likelihood decoding ; MIMO ; Receiving antennas ; Transmitting antennas</subject><ispartof>2009 IEEE Sarnoff Symposium, 2009, p.1-4</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4850286$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,27904,54898</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4850286$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Colavito, L.</creatorcontrib><creatorcontrib>Silage, D.</creatorcontrib><title>An incremental PGA architecture for STBC MIMO decoding</title><title>2009 IEEE Sarnoff Symposium</title><addtitle>SARNOF</addtitle><description>Space-time block codes (STBC) are desirable for use in multiple-input multiple-output (MIMO) communications systems because they can be decoded using only linear computations involving multiplication and addition. However, the number of simple operations and storage required may not be trivial for practical applications. This paper describes a method of implementing STBC MIMO decoding in programmable gate array (PGA) hardware using an incremental approach that reduces resource and storage requirements as compared to a direct implementation. A three antenna rate-frac12 STBC code is used as an example, but the techniques are readily applicable to other codes.</description><subject>Additive white noise</subject><subject>Block codes</subject><subject>Communication channels</subject><subject>Computer architecture</subject><subject>Electronics packaging</subject><subject>Equations</subject><subject>Maximum likelihood decoding</subject><subject>MIMO</subject><subject>Receiving antennas</subject><subject>Transmitting antennas</subject><isbn>9781424433810</isbn><isbn>1424433819</isbn><isbn>1424433827</isbn><isbn>9781424433827</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2009</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo1T81OwzAYC0KTYKNPsEteoCVfkubnWCo2Jm0Usd6npP0KQVuH0nLg7Sli-GJbsiybkCWwDIDZ-33x-lytMs6YzaTJGTfqisxBcimFMFxfk8Rq8--Bzch8yhoLbMINSYbh41fJnFurb4kqehr6JuIJ-9Ed6cu6oC4272HEZvyKSLtzpPv6oaS7za6iLTbnNvRvd2TWueOAyYUXpF491uVTuq3Wm7LYpsGyMdUdQ6-6znowkotpvoc2V9YAai-E0gK9YTlIhqCNctpxEMz43LRCS-fEgiz_agMiHj5jOLn4fbjcFj_gAEah</recordid><startdate>200903</startdate><enddate>200903</enddate><creator>Colavito, L.</creator><creator>Silage, D.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200903</creationdate><title>An incremental PGA architecture for STBC MIMO decoding</title><author>Colavito, L. ; Silage, D.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-7f0eb6ff9b18423109b1d56981e7b33673eb805140e1786a7a21308b58d374aa3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2009</creationdate><topic>Additive white noise</topic><topic>Block codes</topic><topic>Communication channels</topic><topic>Computer architecture</topic><topic>Electronics packaging</topic><topic>Equations</topic><topic>Maximum likelihood decoding</topic><topic>MIMO</topic><topic>Receiving antennas</topic><topic>Transmitting antennas</topic><toplevel>online_resources</toplevel><creatorcontrib>Colavito, L.</creatorcontrib><creatorcontrib>Silage, D.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Colavito, L.</au><au>Silage, D.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>An incremental PGA architecture for STBC MIMO decoding</atitle><btitle>2009 IEEE Sarnoff Symposium</btitle><stitle>SARNOF</stitle><date>2009-03</date><risdate>2009</risdate><spage>1</spage><epage>4</epage><pages>1-4</pages><isbn>9781424433810</isbn><isbn>1424433819</isbn><eisbn>1424433827</eisbn><eisbn>9781424433827</eisbn><abstract>Space-time block codes (STBC) are desirable for use in multiple-input multiple-output (MIMO) communications systems because they can be decoded using only linear computations involving multiplication and addition. However, the number of simple operations and storage required may not be trivial for practical applications. This paper describes a method of implementing STBC MIMO decoding in programmable gate array (PGA) hardware using an incremental approach that reduces resource and storage requirements as compared to a direct implementation. A three antenna rate-frac12 STBC code is used as an example, but the techniques are readily applicable to other codes.</abstract><pub>IEEE</pub><doi>10.1109/SARNOF.2009.4850286</doi><tpages>4</tpages></addata></record> |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Additive white noise Block codes Communication channels Computer architecture Electronics packaging Equations Maximum likelihood decoding MIMO Receiving antennas Transmitting antennas |
| title | An incremental PGA architecture for STBC MIMO decoding |
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