Development of an Embedded CPU-Based Instrument Control Unit for the SIR-2 Instrument Onboard the Chandrayaan-1 Mission to the Moon

This paper presents a computer architecture developed for the instrument control unit (ICU) of the Spectrometer Infrared 2 (SIR-2) instrument onboard the Chandrayaan-1 mission to the Moon. Characteristic features of this architecture are its high autonomy, its high reliability, and its high performa...

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Veröffentlicht in:IEEE transactions on geoscience and remote sensing 2009-08, Vol.47 (8), p.2836-2846
Hauptverfasser: Torheim, O., Bronstad, K., Heerlein, K., Mall, U., Nathues, A., Nowosielski, W., Orleanski, P., Pommeresche, B., Reimundo, V., Skogseide, Y., Solberg, A., Ullaland, K.
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Sprache:eng
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Zusammenfassung:This paper presents a computer architecture developed for the instrument control unit (ICU) of the Spectrometer Infrared 2 (SIR-2) instrument onboard the Chandrayaan-1 mission to the Moon. Characteristic features of this architecture are its high autonomy, its high reliability, and its high performance, which are obtained by the following methods: 1) adopting state-of-the-art digital-construction techniques using one single radiation-tolerant field-programmable gate array for implementing an embedded system with a 32-bit central processing unit, commercial intellectual-property cores, and custom-specified logic; 2) implementing two independent communication buses, one for instrument commanding and instrument health monitoring and another one for transferring scientific and housekeeping data to the spacecraft; 3) implementing simple and well-arranged hardware, firmware, and software; and 4) implementing in-flight software-reconfiguration capabilities available from ground command. The SIR-2 ICU performs data acquisition, data processing, and temperature regulation. Per-spectrum averaging and per-pixel oversampling are supported to reduce measurement noise. A temperature regulator for the instrument sensor unit is also implemented, with the purpose of reducing dark current noise from the detector. The embedded real-time software is implemented as a multirate cyclic executive with interrupts. Five different tasks are maintained, running with a 10-ms base cycle time. A safe mode is implemented in the boot-loader, allowing in-flight software patching through the MIL-STD-1553B bus. The advanced features of this architecture make it an excellent choice for the control unit of the scientific SIR-2 instrument, compared with architectures from previous heritage.
ISSN:0196-2892
1558-0644
DOI:10.1109/TGRS.2009.2015940