A novel technique for fabricating semiconductor nanodevice arrays on silicon
We have developed a novel low cost nanogrowth technology for the fabrication of periodic arrays of semiconductor quantum dots on silicon with good device size uniformity. The technique utilizes material growth on a preformed template formed by electrochemical etching of aluminum on silicon. The temp...
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| creator | McGinnis, S.P. Das, B. |
| description | We have developed a novel low cost nanogrowth technology for the fabrication of periodic arrays of semiconductor quantum dots on silicon with good device size uniformity. The technique utilizes material growth on a preformed template formed by electrochemical etching of aluminum on silicon. The template contains a periodic array of pores in which the semiconductor material is synthesized. The technique is inexpensive, reliable, suitable for the fabrication of a variety of semiconductors, VLSI compatible and has the potential for integration of quantum dot devices with silicon integrated circuits. |
| doi_str_mv | 10.1109/CORNEL.1995.482433 |
| format | Conference Proceeding |
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The technique utilizes material growth on a preformed template formed by electrochemical etching of aluminum on silicon. The template contains a periodic array of pores in which the semiconductor material is synthesized. The technique is inexpensive, reliable, suitable for the fabrication of a variety of semiconductors, VLSI compatible and has the potential for integration of quantum dot devices with silicon integrated circuits.</description><identifier>ISSN: 1079-4700</identifier><identifier>ISBN: 9780780339705</identifier><identifier>ISBN: 0780324420</identifier><identifier>ISBN: 9780780324428</identifier><identifier>ISBN: 0780339703</identifier><identifier>DOI: 10.1109/CORNEL.1995.482433</identifier><language>eng</language><publisher>IEEE</publisher><subject>Aluminum ; Costs ; Etching ; Fabrication ; Integrated circuit reliability ; Integrated circuit synthesis ; Nanoscale devices ; Quantum dots ; Semiconductor materials ; Silicon</subject><ispartof>Proceedings IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, 1995, p.179-188</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/482433$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,4050,4051,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/482433$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>McGinnis, S.P.</creatorcontrib><creatorcontrib>Das, B.</creatorcontrib><title>A novel technique for fabricating semiconductor nanodevice arrays on silicon</title><title>Proceedings IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits</title><addtitle>CORNEL</addtitle><description>We have developed a novel low cost nanogrowth technology for the fabrication of periodic arrays of semiconductor quantum dots on silicon with good device size uniformity. The technique utilizes material growth on a preformed template formed by electrochemical etching of aluminum on silicon. The template contains a periodic array of pores in which the semiconductor material is synthesized. The technique is inexpensive, reliable, suitable for the fabrication of a variety of semiconductors, VLSI compatible and has the potential for integration of quantum dot devices with silicon integrated circuits.</description><subject>Aluminum</subject><subject>Costs</subject><subject>Etching</subject><subject>Fabrication</subject><subject>Integrated circuit reliability</subject><subject>Integrated circuit synthesis</subject><subject>Nanoscale devices</subject><subject>Quantum dots</subject><subject>Semiconductor materials</subject><subject>Silicon</subject><issn>1079-4700</issn><isbn>9780780339705</isbn><isbn>0780324420</isbn><isbn>9780780324428</isbn><isbn>0780339703</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1995</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj99KwzAYxQMqOOdeYFd5gdZ8TZo_l2NMHRQHotcjTb5opEu16QZ7eysTDhw453DgR8gSWAnAzMN69_qyaUowpi6FrgTnV2RhlGaTODeK1ddkBkyZQijGbsldzl-M1ULXekaaFU39CTs6ovtM8eeINPQDDbYdorNjTB804yG6PvmjG6cm2dR7PEWH1A6DPWfaJ5pj9ze5JzfBdhkX_z4n74-bt_Vz0eyetutVU0RgYiwqrpxufatlkJXwIEG2uvJyClFYUCEo76WpLIIAUFwwLZ3l7UTLrNGBz8ny8hsRcf89xIMdzvsLO_8Fl1VOkA</recordid><startdate>1995</startdate><enddate>1995</enddate><creator>McGinnis, S.P.</creator><creator>Das, B.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1995</creationdate><title>A novel technique for fabricating semiconductor nanodevice arrays on silicon</title><author>McGinnis, S.P. ; Das, B.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i104t-237c8bdb86f624d1616b82d6c8be4a17ff7dd692ae1411734086ca3b1100a98f3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1995</creationdate><topic>Aluminum</topic><topic>Costs</topic><topic>Etching</topic><topic>Fabrication</topic><topic>Integrated circuit reliability</topic><topic>Integrated circuit synthesis</topic><topic>Nanoscale devices</topic><topic>Quantum dots</topic><topic>Semiconductor materials</topic><topic>Silicon</topic><toplevel>online_resources</toplevel><creatorcontrib>McGinnis, S.P.</creatorcontrib><creatorcontrib>Das, B.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>McGinnis, S.P.</au><au>Das, B.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A novel technique for fabricating semiconductor nanodevice arrays on silicon</atitle><btitle>Proceedings IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits</btitle><stitle>CORNEL</stitle><date>1995</date><risdate>1995</risdate><spage>179</spage><epage>188</epage><pages>179-188</pages><issn>1079-4700</issn><isbn>9780780339705</isbn><isbn>0780324420</isbn><isbn>9780780324428</isbn><isbn>0780339703</isbn><abstract>We have developed a novel low cost nanogrowth technology for the fabrication of periodic arrays of semiconductor quantum dots on silicon with good device size uniformity. The technique utilizes material growth on a preformed template formed by electrochemical etching of aluminum on silicon. The template contains a periodic array of pores in which the semiconductor material is synthesized. The technique is inexpensive, reliable, suitable for the fabrication of a variety of semiconductors, VLSI compatible and has the potential for integration of quantum dot devices with silicon integrated circuits.</abstract><pub>IEEE</pub><doi>10.1109/CORNEL.1995.482433</doi><tpages>10</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 1079-4700 |
| ispartof | Proceedings IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, 1995, p.179-188 |
| issn | 1079-4700 |
| language | eng |
| recordid | cdi_ieee_primary_482433 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Aluminum Costs Etching Fabrication Integrated circuit reliability Integrated circuit synthesis Nanoscale devices Quantum dots Semiconductor materials Silicon |
| title | A novel technique for fabricating semiconductor nanodevice arrays on silicon |
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