A Built-in self-calibration scheme for pipelined ADCs

There is a strong demand for both calibrating and testing the ADC performance before and after packaging for mixed-signal SoCs and SiPs. In this paper, we propose a built-in self-calibration scheme that offers digitally-controlled calibration of a pipelined ADC without using external stimulus. We fu...

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Hauptverfasser: Hsiu-Ming Chang, Kuan-Yu Lin, Chin-Hsuan Chen, Kwang-Ting Cheng
Format: Tagungsbericht
Sprache:eng
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Beschreibung
Zusammenfassung:There is a strong demand for both calibrating and testing the ADC performance before and after packaging for mixed-signal SoCs and SiPs. In this paper, we propose a built-in self-calibration scheme that offers digitally-controlled calibration of a pipelined ADC without using external stimulus. We further propose a self-testing strategy that uses the effective number of bits (ENOB) derived directly from the steady-state error of the self-calibration process for go/no-go testing as well as for performance binning. This testing process will not incur any additional test time beyond that required for calibration.
ISSN:1948-3287
1948-3295
DOI:10.1109/ISQED.2009.4810305