The impact of la-doping on the reliability of low Vth high-k/metal gate nMOSFETs under various gate stress conditions

La-doped HfSiO samples show lower threshold voltage (V th ) and gate current (I gate ), which is attributed to dipole formation at the high-k/SiO 2 interface. At low and intermediate field stress, La-doped devices exhibit better immunity to positive bias temperature instability (PBTI) due to their l...

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Hauptverfasser: Kang, C.Y., Young, C.D., Huang, J., Kirsch, P., Heh, D., Sivasubramani, P., Park, H.K., Bersuker, G., Lee, B.H., Choi, H.S., Lee, K.T., Jeong, Y.-H., Lichtenwalner, J., Kingon, A.I., Tseng, H.-H., Jammy, R.
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:La-doped HfSiO samples show lower threshold voltage (V th ) and gate current (I gate ), which is attributed to dipole formation at the high-k/SiO 2 interface. At low and intermediate field stress, La-doped devices exhibit better immunity to positive bias temperature instability (PBTI) due to their lower charge trapping efficiency than the control HfSiO, which mainly results from a dipole-induced greater barrier offset. However, the primary cause for defect generation at high field stress is attributed to the La atoms in the interfacial SiO 2 layer. By optimizing the technique to incorporate nitrogen into the bottom interface, this high field reliability issue can be minimized while maintaining good device characteristics.
ISSN:0163-1918
2156-017X
DOI:10.1109/IEDM.2008.4796628