The Design of Radix-4 FFT by FPGA

This paper designs and realizes a synthetic aperture radar (SAR) real-time processor by FPGA chip, Radix-4FFT is the kernel processing in compression algorithm of SAR; The memory organization of Radix-4 FFT is considered. The design of the block floating Radix-4 FFT is valuable in military and civil...

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Bibliographische Detailangaben
Hauptverfasser:	Zhijian Sun, Xuemei Liu, Zhongxing Ji
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Algorithm design and analysis Compression algorithms Design methodology Digital signal processing Digital signal processing chips DSP Field programmable gate arrays FPGA chip Hardware Kernel Radix-4 FFT Read-write memory real-time processor Synthetic aperture radar Synthetic Aperture Radar (SAR)
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Zusammenfassung:	This paper designs and realizes a synthetic aperture radar (SAR) real-time processor by FPGA chip, Radix-4FFT is the kernel processing in compression algorithm of SAR; The memory organization of Radix-4 FFT is considered. The design of the block floating Radix-4 FFT is valuable in military and civil application, and the complete of transpose is valuable for the later SAR real-time processing research. This paper analyses the performance advantages of using FPGA, and present the processing result of a frame of airborne SAR original data.
DOI:	10.1109/IITA.Workshops.2008.32