Constraint satisfaction for test program generation
A central problem in automatic test generation is solving constraints for memory access generation. A framework, and an algorithm that has been implemented in the Model-Based Test-Generator are described. This generic algorithm allows flexibility in modeling new addressing modes with which memory ac...
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| creator | Lewin, D. Fournier, L. Levinger, M. Roytman, E. Shurek, G. |
| description | A central problem in automatic test generation is solving constraints for memory access generation. A framework, and an algorithm that has been implemented in the Model-Based Test-Generator are described. This generic algorithm allows flexibility in modeling new addressing modes with which memory accesses are generated. The algorithm currently handles address constraint satisfaction for complex addressing modes in the PowerPC, x86, and other architectures.< > |
| doi_str_mv | 10.1109/PCCC.1995.472513 |
| format | Conference Proceeding |
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| identifier | ISBN: 9780780324923 |
| ispartof | Proceedings International Phoenix Conference on Computers and Communications, 1995, p.45-48 |
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| language | eng |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Automatic testing Computer architecture Gas insulated transmission lines Heart Laboratories Memory management Power system modeling Predictive models Registers Software testing |
| title | Constraint satisfaction for test program generation |
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