A 45nm single power supply SRAM supporting low voltage operation down to 0.6V

A 45nm single power supply SRAM supporting low voltage operation down to 0.6V

A 256 Kb SRAM macrocell has been implemented in a 45 nm Low Power CMOS technology. A process and temperature tracking write-assist scheme, a write booster circuit and an adaptive read assist scheme allow low voltage operation down to 0.6 V with a single power supply.

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Barasinski, S., Camus, L., Clerc, S.
Format: Tagungsbericht
Sprache:eng ; jpn
Schlagworte:
Circuits
CMOS technology
Emulation
Latches
Low voltage
Macrocell networks
MOSFETs
Power supplies
Random access memory
Timing
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A 256 Kb SRAM macrocell has been implemented in a 45 nm Low Power CMOS technology. A process and temperature tracking write-assist scheme, a write booster circuit and an adaptive read assist scheme allow low voltage operation down to 0.6 V with a single power supply.
ISSN:1930-8833
2643-1319
DOI:10.1109/ESSCIRC.2008.4681902