An on-chip dual supply charge pump system for 45nm PD SOI eDRAM

An on-chip dual supply charge pump system for 45nm PD SOI eDRAM

We present an on-chip word line (WL) dual supply system for server class embedded DRAM (eDRAM) applications. The design consists of switched capacitor charge pumps, voltage regulators, reference and clock circuits. Charge pump engines feature efficient charge transfer and energy conversion, boosting...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Kuang, J.B., Mathews, A., Barth, J., Gebara, F., Nguyen, T., Schaub, J., Nowka, K., Carpenter, G., Plass, D., Nelson, E., Vo, I., Reohr, W., Kirihata, T.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Charge pumps
Charge transfer
Clocks
eDRAM
Engines
Random access memory
Regulators
SOI
Switched capacitor circuits
Switching circuits
System-on-a-chip
Voltage
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:We present an on-chip word line (WL) dual supply system for server class embedded DRAM (eDRAM) applications. The design consists of switched capacitor charge pumps, voltage regulators, reference and clock circuits. Charge pump engines feature efficient charge transfer and energy conversion, boosting unregulated rails to 1.8x supply. At vdd=1 V, regulated high (1.5 to 1.7 V) and low (-0.3 to -0.6 V) levels ensure WL overdrive and cell turn-off, respectively, with rippling
ISSN:1930-8833
2643-1319
DOI:10.1109/ESSCIRC.2008.4681793