Lifting-based wavelet transform for images on modern CPU architectures

Lifting-based wavelet transform for images on modern CPU architectures

This article analyzes performance of various 2D wavelet transform implementations based on the lifting scheme for the CDF 9/7 filterbank with respect to the modern and most recent CPU architectures. We propose three methods combining different approaches to memory locality handling and parallelism,...

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Bibliographische Detailangaben
Hauptverfasser: Maly, J., Rajmic, P.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
4D layout
Central Processing Unit
Computer architecture
fast lifting wavelet transform
Filter bank
Libraries
Microcomputers
parallel optimization
Parallel processing
Performance analysis
Testing
threading building blocks
Wavelet analysis
Wavelet transforms
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Beschreibung
Zusammenfassung:This article analyzes performance of various 2D wavelet transform implementations based on the lifting scheme for the CDF 9/7 filterbank with respect to the modern and most recent CPU architectures. We propose three methods combining different approaches to memory locality handling and parallelism, which is obtained using Intel Threading Building Blocks developer libraries. Implementations were tested on a wide range of Intel-based personal computers.
DOI:10.1109/ICSES.2008.4673386