Metrology for the Electrical Characterization of Semiconductor Nanowires

Nanoelectronic devices based upon self-assembled semiconductor nanowires are excellent research tools for investigating the behavior of structures with sublithographic features as well as a promising basis for future information processing technologies. New test structures and associated electrical measurement methods are the primary metrology needs necessary to enable the development, assessment, and adoption of emerging nanowire electronics. We describe two unique approaches to successfully fabricate nanowire devices: one based upon harvesting and positioning nanowires and one based upon the direct growth of nanowires in predefined locations. Test structures are fabricated and electronically characterized to probe the fundamental properties of chemical-vapor-deposition-grown silicon nanowires. Important information about current transport and fluctuations in materials and devices can be derived from noise measurements, and low-frequency \hbox{1}/f noise has traditionally been utilized as a quality and reliability indicator for semiconductor devices. Both low-frequency \hbox{1}/f noise and random telegraph signals are shown here to be powerful methods for probing trapping defects in nanoelectronic devices.