Strain Enhanced nMOS Using In Situ Doped Embedded \hbox\hbox S/D Stressors With up to 1.5% Substitutional Carbon Content Grown Using a Novel Deposition Process
This letter reports on the implementation of high carbon content and high phosphorous content Si 1-x C x layers in the source and drain regions of n-type MOSFET in a 65-nm-node integration scheme. The layers were grown using a novel epitaxial process. It is shown that by implementing stressors with...
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| Veröffentlicht in: | IEEE electron device letters 2008-11, Vol.29 (11), p.1206-1208 |
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| container_end_page | 1208 |
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| container_issue | 11 |
| container_start_page | 1206 |
| container_title | IEEE electron device letters |
| container_volume | 29 |
| creator | Verheyen, P. Machkaoutsan, V. Bauer, M. Weeks, D. Kerner, C. Clemente, F. Bender, H. Shamiryan, D. Loo, R. Hoffmann, T. Absil, P. Biesemans, S. Thomas, S.G. |
| description | This letter reports on the implementation of high carbon content and high phosphorous content Si 1-x C x layers in the source and drain regions of n-type MOSFET in a 65-nm-node integration scheme. The layers were grown using a novel epitaxial process. It is shown that by implementing stressors with x ap 0.01, nMOSFET device performance is enhanced by up to 10%, driving 880 muA/mum at 1-V V DD . It is also demonstrated that the successful implementation of Si 1-x C x relies on the careful choice of integration and epitaxial layer parameters. There is a clear impact of the postepitaxial implantation and thermal treatment on the retained substitutional C content ([ C sub ]). Furthermore, adding a Si capping layer on top of the Si 1 -x C x , greatly improves upon the stressors' stability during the downstream processing and the silicide sheet resistance. |
| doi_str_mv | 10.1109/LED.2008.2005593 |
| format | Article |
| fullrecord | <record><control><sourceid>crossref_RIE</sourceid><recordid>TN_cdi_ieee_primary_4655506</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>4655506</ieee_id><sourcerecordid>10_1109_LED_2008_2005593</sourcerecordid><originalsourceid>FETCH-LOGICAL-c1086-41161ec0ee39f103c862a240d27c13238c022068daf46c29548cda1eea7962e13</originalsourceid><addsrcrecordid>eNo9kE9r20AQxZfQQN2k90Iuc-lRzsz-s3QstuMG3Caghl4KYr0axwrOrtmVk-bT9KtGTkwvbwbmvTfwE-IL4ZgIq8vlfDaWiOVBjKnUiRiRMWWBxqoPYoQTTYUitB_Fp5wfEEnriR6Jf3WfXBdgHjYueG4h_Lip4S534R6uA9Rdv4dZ3A2H-eOK23ZY_mxW8e-bQH05g6GAc44pw--u38B-B30EGpuvUO9XuR8K-i4Gt4WpS6sYYBpDz6GHRYrP4fjJwc_4xFuY8S7m7uCH2xT90HsuTtdum_nzcZ6Ju6v5r-n3YnmzuJ5-WxaesLSFJrLEHplVtSZUvrTSSY2tnHhSUpUepURbtm6trZeV0aVvHTG7SWUlkzoT-N7rU8w58brZpe7RpZeGsDkAbgbAzQFwcwQ8RC7eIx0z_7dra4xBq14Bvo129w</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>Strain Enhanced nMOS Using In Situ Doped Embedded \hbox\hbox S/D Stressors With up to 1.5% Substitutional Carbon Content Grown Using a Novel Deposition Process</title><source>IEEE Electronic Library (IEL)</source><creator>Verheyen, P. ; Machkaoutsan, V. ; Bauer, M. ; Weeks, D. ; Kerner, C. ; Clemente, F. ; Bender, H. ; Shamiryan, D. ; Loo, R. ; Hoffmann, T. ; Absil, P. ; Biesemans, S. ; Thomas, S.G.</creator><creatorcontrib>Verheyen, P. ; Machkaoutsan, V. ; Bauer, M. ; Weeks, D. ; Kerner, C. ; Clemente, F. ; Bender, H. ; Shamiryan, D. ; Loo, R. ; Hoffmann, T. ; Absil, P. ; Biesemans, S. ; Thomas, S.G.</creatorcontrib><description>This letter reports on the implementation of high carbon content and high phosphorous content Si 1-x C x layers in the source and drain regions of n-type MOSFET in a 65-nm-node integration scheme. The layers were grown using a novel epitaxial process. It is shown that by implementing stressors with x ap 0.01, nMOSFET device performance is enhanced by up to 10%, driving 880 muA/mum at 1-V V DD . It is also demonstrated that the successful implementation of Si 1-x C x relies on the careful choice of integration and epitaxial layer parameters. There is a clear impact of the postepitaxial implantation and thermal treatment on the retained substitutional C content ([ C sub ]). Furthermore, adding a Si capping layer on top of the Si 1 -x C x , greatly improves upon the stressors' stability during the downstream processing and the silicide sheet resistance.</description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/LED.2008.2005593</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>IEEE</publisher><subject>Annealing ; Capacitive sensors ; Embedded source and drain (S/D) ; Epitaxial growth ; Epitaxial layers ; Etching ; hbox{Si}_{1 - x}\hbox{C}_{x} ; Implants ; MOS devices ; MOSFETs ; Silicides ; Stability ; strained Si</subject><ispartof>IEEE electron device letters, 2008-11, Vol.29 (11), p.1206-1208</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c1086-41161ec0ee39f103c862a240d27c13238c022068daf46c29548cda1eea7962e13</citedby><cites>FETCH-LOGICAL-c1086-41161ec0ee39f103c862a240d27c13238c022068daf46c29548cda1eea7962e13</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4655506$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4655506$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Verheyen, P.</creatorcontrib><creatorcontrib>Machkaoutsan, V.</creatorcontrib><creatorcontrib>Bauer, M.</creatorcontrib><creatorcontrib>Weeks, D.</creatorcontrib><creatorcontrib>Kerner, C.</creatorcontrib><creatorcontrib>Clemente, F.</creatorcontrib><creatorcontrib>Bender, H.</creatorcontrib><creatorcontrib>Shamiryan, D.</creatorcontrib><creatorcontrib>Loo, R.</creatorcontrib><creatorcontrib>Hoffmann, T.</creatorcontrib><creatorcontrib>Absil, P.</creatorcontrib><creatorcontrib>Biesemans, S.</creatorcontrib><creatorcontrib>Thomas, S.G.</creatorcontrib><title>Strain Enhanced nMOS Using In Situ Doped Embedded \hbox\hbox S/D Stressors With up to 1.5% Substitutional Carbon Content Grown Using a Novel Deposition Process</title><title>IEEE electron device letters</title><addtitle>LED</addtitle><description>This letter reports on the implementation of high carbon content and high phosphorous content Si 1-x C x layers in the source and drain regions of n-type MOSFET in a 65-nm-node integration scheme. The layers were grown using a novel epitaxial process. It is shown that by implementing stressors with x ap 0.01, nMOSFET device performance is enhanced by up to 10%, driving 880 muA/mum at 1-V V DD . It is also demonstrated that the successful implementation of Si 1-x C x relies on the careful choice of integration and epitaxial layer parameters. There is a clear impact of the postepitaxial implantation and thermal treatment on the retained substitutional C content ([ C sub ]). Furthermore, adding a Si capping layer on top of the Si 1 -x C x , greatly improves upon the stressors' stability during the downstream processing and the silicide sheet resistance.</description><subject>Annealing</subject><subject>Capacitive sensors</subject><subject>Embedded source and drain (S/D)</subject><subject>Epitaxial growth</subject><subject>Epitaxial layers</subject><subject>Etching</subject><subject>hbox{Si}_{1 - x}\hbox{C}_{x}</subject><subject>Implants</subject><subject>MOS devices</subject><subject>MOSFETs</subject><subject>Silicides</subject><subject>Stability</subject><subject>strained Si</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2008</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE9r20AQxZfQQN2k90Iuc-lRzsz-s3QstuMG3Caghl4KYr0axwrOrtmVk-bT9KtGTkwvbwbmvTfwE-IL4ZgIq8vlfDaWiOVBjKnUiRiRMWWBxqoPYoQTTYUitB_Fp5wfEEnriR6Jf3WfXBdgHjYueG4h_Lip4S534R6uA9Rdv4dZ3A2H-eOK23ZY_mxW8e-bQH05g6GAc44pw--u38B-B30EGpuvUO9XuR8K-i4Gt4WpS6sYYBpDz6GHRYrP4fjJwc_4xFuY8S7m7uCH2xT90HsuTtdum_nzcZ6Ju6v5r-n3YnmzuJ5-WxaesLSFJrLEHplVtSZUvrTSSY2tnHhSUpUepURbtm6trZeV0aVvHTG7SWUlkzoT-N7rU8w58brZpe7RpZeGsDkAbgbAzQFwcwQ8RC7eIx0z_7dra4xBq14Bvo129w</recordid><startdate>200811</startdate><enddate>200811</enddate><creator>Verheyen, P.</creator><creator>Machkaoutsan, V.</creator><creator>Bauer, M.</creator><creator>Weeks, D.</creator><creator>Kerner, C.</creator><creator>Clemente, F.</creator><creator>Bender, H.</creator><creator>Shamiryan, D.</creator><creator>Loo, R.</creator><creator>Hoffmann, T.</creator><creator>Absil, P.</creator><creator>Biesemans, S.</creator><creator>Thomas, S.G.</creator><general>IEEE</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>200811</creationdate><title>Strain Enhanced nMOS Using In Situ Doped Embedded \hbox\hbox S/D Stressors With up to 1.5% Substitutional Carbon Content Grown Using a Novel Deposition Process</title><author>Verheyen, P. ; Machkaoutsan, V. ; Bauer, M. ; Weeks, D. ; Kerner, C. ; Clemente, F. ; Bender, H. ; Shamiryan, D. ; Loo, R. ; Hoffmann, T. ; Absil, P. ; Biesemans, S. ; Thomas, S.G.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c1086-41161ec0ee39f103c862a240d27c13238c022068daf46c29548cda1eea7962e13</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2008</creationdate><topic>Annealing</topic><topic>Capacitive sensors</topic><topic>Embedded source and drain (S/D)</topic><topic>Epitaxial growth</topic><topic>Epitaxial layers</topic><topic>Etching</topic><topic>hbox{Si}_{1 - x}\hbox{C}_{x}</topic><topic>Implants</topic><topic>MOS devices</topic><topic>MOSFETs</topic><topic>Silicides</topic><topic>Stability</topic><topic>strained Si</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Verheyen, P.</creatorcontrib><creatorcontrib>Machkaoutsan, V.</creatorcontrib><creatorcontrib>Bauer, M.</creatorcontrib><creatorcontrib>Weeks, D.</creatorcontrib><creatorcontrib>Kerner, C.</creatorcontrib><creatorcontrib>Clemente, F.</creatorcontrib><creatorcontrib>Bender, H.</creatorcontrib><creatorcontrib>Shamiryan, D.</creatorcontrib><creatorcontrib>Loo, R.</creatorcontrib><creatorcontrib>Hoffmann, T.</creatorcontrib><creatorcontrib>Absil, P.</creatorcontrib><creatorcontrib>Biesemans, S.</creatorcontrib><creatorcontrib>Thomas, S.G.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Verheyen, P.</au><au>Machkaoutsan, V.</au><au>Bauer, M.</au><au>Weeks, D.</au><au>Kerner, C.</au><au>Clemente, F.</au><au>Bender, H.</au><au>Shamiryan, D.</au><au>Loo, R.</au><au>Hoffmann, T.</au><au>Absil, P.</au><au>Biesemans, S.</au><au>Thomas, S.G.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Strain Enhanced nMOS Using In Situ Doped Embedded \hbox\hbox S/D Stressors With up to 1.5% Substitutional Carbon Content Grown Using a Novel Deposition Process</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>2008-11</date><risdate>2008</risdate><volume>29</volume><issue>11</issue><spage>1206</spage><epage>1208</epage><pages>1206-1208</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract>This letter reports on the implementation of high carbon content and high phosphorous content Si 1-x C x layers in the source and drain regions of n-type MOSFET in a 65-nm-node integration scheme. The layers were grown using a novel epitaxial process. It is shown that by implementing stressors with x ap 0.01, nMOSFET device performance is enhanced by up to 10%, driving 880 muA/mum at 1-V V DD . It is also demonstrated that the successful implementation of Si 1-x C x relies on the careful choice of integration and epitaxial layer parameters. There is a clear impact of the postepitaxial implantation and thermal treatment on the retained substitutional C content ([ C sub ]). Furthermore, adding a Si capping layer on top of the Si 1 -x C x , greatly improves upon the stressors' stability during the downstream processing and the silicide sheet resistance.</abstract><pub>IEEE</pub><doi>10.1109/LED.2008.2005593</doi><tpages>3</tpages></addata></record> |
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| source | IEEE Electronic Library (IEL) |
| subjects | Annealing Capacitive sensors Embedded source and drain (S/D) Epitaxial growth Epitaxial layers Etching hbox{Si}_{1 - x}\hbox{C}_{x} Implants MOS devices MOSFETs Silicides Stability strained Si |
| title | Strain Enhanced nMOS Using In Situ Doped Embedded \hbox\hbox S/D Stressors With up to 1.5% Substitutional Carbon Content Grown Using a Novel Deposition Process |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-13T12%3A30%3A59IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-crossref_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Strain%20Enhanced%20nMOS%20Using%20In%20Situ%20Doped%20Embedded%20%5Chbox%5Chbox%20S/D%20Stressors%20With%20up%20to%201.5%25%20Substitutional%20Carbon%20Content%20Grown%20Using%20a%20Novel%20Deposition%20Process&rft.jtitle=IEEE%20electron%20device%20letters&rft.au=Verheyen,%20P.&rft.date=2008-11&rft.volume=29&rft.issue=11&rft.spage=1206&rft.epage=1208&rft.pages=1206-1208&rft.issn=0741-3106&rft.eissn=1558-0563&rft.coden=EDLEDZ&rft_id=info:doi/10.1109/LED.2008.2005593&rft_dat=%3Ccrossref_RIE%3E10_1109_LED_2008_2005593%3C/crossref_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=4655506&rfr_iscdi=true |