A Methodology for Implementation of the Execution Phase of Artificial Neural Networks in Digital Hardware Devices

In this paper we describe a methodology for implementing the phase of execution of artificial neural networks (ANN) in hardware devices. First, we show how the elements of a single neuron: multipliers, sum of products and transfer function are separated and constructed as VHDL entities. These entiti...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Pealoza, U.C., Esquer, J., Rios, B.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Artificial neural networks Digital signal processing Generators Hardware Hardware design languages Hardware Implementation Methodology Neural Networks Neurons Transfer functions
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