Advanced localization technique of failures in packages / IO-stages of chips using Vector Network Analyser

Advanced localization technique of failures in packages / IO-stages of chips using Vector Network Analyser

Current time domain reflectometry (TDR) equipment suffers from certain limitations [1]. These can be resolved by using a vector network analyser (VNA) system [2]. This paper will highlight the advances and drawbacks of using a VNA for the localization of failures within the signal path of packages o...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Krueger, B., Pohl, H., Schumann, F., Schoemann, S.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Bandwidth
Frequency domain analysis
Impedance
Instruments
Probes
Substrates
Time domain analysis
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Current time domain reflectometry (TDR) equipment suffers from certain limitations [1]. These can be resolved by using a vector network analyser (VNA) system [2]. This paper will highlight the advances and drawbacks of using a VNA for the localization of failures within the signal path of packages or input-/output-stages of chips. Various examples will demonstrate the capabilities. Further improvements by using simulation tools may be possible.
ISSN:1946-1542
1946-1550
DOI:10.1109/IPFA.2008.4588163