Next generation Intel® micro-architecture (Nehalem) clocking architecture

Next generation Intel® micro-architecture (Nehalem) clocking architecture

This paper describes the next generation Intel reg micro-architecture (Nehalem) 45 nm IA processorpsilas core and I/O clocking architecture. Among the highlights are: configurable clocking, fastlock low-skew PLLs, high reference clock frequencies, analog supply tracking system, adaptive frequency cl...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Kurd, N., Douglas, J., Mosalikanti, P., Kumar, R.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Clocks
DLL
Frequency modulation
Integrated circuit interconnections
Intel® QuickPath
interconnect
Jitter
memory controller
Phase locked loops
PLL
Synchronization
Time frequency analysis
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Beschreibung
Zusammenfassung:This paper describes the next generation Intel reg micro-architecture (Nehalem) 45 nm IA processorpsilas core and I/O clocking architecture. Among the highlights are: configurable clocking, fastlock low-skew PLLs, high reference clock frequencies, analog supply tracking system, adaptive frequency clocking, low jitter Intel reg QuickPath interconnect and Intel reg QuickPath memory controller clock generation, and jitter-attenuating DLLs.
ISSN:2158-5601
2158-5636
DOI:10.1109/VLSIC.2008.4585952