Level Shifters and DCVSL for a Low-Voltage CMOS 4.2-V Buck Converter

In this paper, high-voltage (HV)-tolerant level shifters with combinational functionality are proposed based on differential cascode voltage switch logic (DCVSL). These level shifters are tolerant to supply voltages higher than the process limit for individual CMOS transistors. The proposed HV DCVSL level shifters are particularly useful when it is mandatory to constrain the output using a logic function during out of the normal mode periods (power-up, power-down, reset, etc.). These HV-tolerant logic circuits were used in the power block of a buck converter designed in a standard 3.3-V 0.13-mum CMOS process, powered by an input voltage range from 2.7 to 4.2 V. Simulation and experimental results of the buck are analyzed, and the topology is evaluated.