A Silicon interposer BGA package with Cu-filled TSV and multi-layer Cu-plating interconnect

A novel silicon interposer (SilP) BGA package (PKG) - SilP PKG - has been developed and qualified through test chip. It features three key process technologies; Cu-filled through Si via (TSV), fine pitch multi-layer wiring with Cu- plating, and micro-bump interconnect. The cost-conscious fabrication process flow has been developed based on the build-up print boards' Cu-plating technology and Si wafer batch process. The SilP PKG reliability as an LSI package has been confirmed.