A low-phase-noise frequency synthesizer for single chip CMOS UHF RFID reader

A novel fractional-N frequency synthesizer which is based on delta sigma modulator (DSM) and specialized for single-chip ultra-high frequency radio-frequency identification (UHF RFID) reader is proposed in this paper. The fractional-N synthesizer is implemented in 0.18 mum CMOS process. The phase noise of the fractional-N synthesizer is approximately -109 dBc/Hz and -129 dBc/Hz at 200 kHz and 1 MHz offset from 900 MHz operating frequency while drawing 9.6 mA from 1.8 V power supply. The synthesizer is evaluated by implementing it in a direct conversion RF front-end. The front-end features a noise figure of 3.5 dB and an input-referred third-order intercept point of 5 dBm.