1T2R Structure with Cross-Spacer for High-Density Phase Change Memory
A novel 2-bit per cell architecture is proposed for high density phase change memory (PCM) array. One transistor controls one pair of cross-spacer type memory cells through a common bottom electrode. Such configuration so-called "chain structure" shows advantages in either enhanced memory...
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| creator | Chain-Ming Lee Chih-Wei Chen Wei-Su Chen Der-Sheng Chao Ming-Jung Chen Yen, P.H. Chen, F. Ming-Jer Kao Ming-Jinn Tsai |
| description | A novel 2-bit per cell architecture is proposed for high density phase change memory (PCM) array. One transistor controls one pair of cross-spacer type memory cells through a common bottom electrode. Such configuration so-called "chain structure" shows advantages in either enhanced memory density or enhanced current driving capability. In this paper, a 1 k bits test array is demonstrated, in which a minimum reset current about 0.4 mA is provided by a 3.3 V NMOS transistor (0.18 um CMOS technology). |
| doi_str_mv | 10.1109/VTSA.2008.4530834 |
| format | Conference Proceeding |
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| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 1524-766X |
| ispartof | 2008 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), 2008, p.136-137 |
| issn | 1524-766X 2690-8174 |
| language | eng |
| recordid | cdi_ieee_primary_4530834 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | CMOS technology Diodes Electrodes Lithography MOSFET circuits Phase change materials Phase change memory Phased arrays Space vector pulse width modulation Voltage |
| title | 1T2R Structure with Cross-Spacer for High-Density Phase Change Memory |
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