LUT-Based Power Macromodeling Technique for DSP Architectures

In this paper, we present a look-up-table (LUT) based power macromodeling technique for digital signal processing (DSP) architecture in terms of the statistical knowledge of their primary inputs. During the power estimation procedure, the sequence of an input stream is generated by a genetic algorithm using input metrics. Then, a Monte Carlo zero-delay simulation is performed and a power dissipation macromodel function is built from power dissipation results. From then on, this macromodel function can be used to estimate power dissipation of the system just by using the statistics of the macro-block's primary inputs. In experiments with the DSP system, the average error is 31.23%.