Analog Capacitor Integration Challenges
This paper discusses the challenges of making a MIM capacitor using a standard back end of line metal stack and a single additional mask. This required development of a capacitor dielectric would also serve as an antireflective coating for patterning 0.25 m metal interconnect lines or smaller. The p...
Gespeichert in:
Hauptverfasser: | , , , , , |
---|---|
Format: | Tagungsbericht |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | This paper discusses the challenges of making a MIM capacitor using a standard back end of line metal stack and a single additional mask. This required development of a capacitor dielectric would also serve as an antireflective coating for patterning 0.25 m metal interconnect lines or smaller. The paper also focuses on the characteristics of the analog capacitors. By improving this dual purpose oxide/SiON/oxide sandwich dielectric layer with special reflectivity properties, this novel integration forms a capacitor which possesses a combination of good voltage linearity or voltage coefficient, low dispersive behavior and hysteresis, and finally excellent matching with low leakage. |
---|---|
ISSN: | 1523-553X |
DOI: | 10.1109/ISSM.2006.4493049 |