A low power CMOS CORDIC processor design for wireless telecommunication
A CORDIC processor for wire telecommunication is integrated in a 0.5 mum CMOS technology. The CORDIC (coordinate rotation digital computer) processor reduces the circuit complexity by performing a sequence of elementary rotations using shift and add operations without multiplications. Hard wired-log...
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Format: | Tagungsbericht |
Sprache: | eng |
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Zusammenfassung: | A CORDIC processor for wire telecommunication is integrated in a 0.5 mum CMOS technology. The CORDIC (coordinate rotation digital computer) processor reduces the circuit complexity by performing a sequence of elementary rotations using shift and add operations without multiplications. Hard wired-logic eliminates the shifter and includes pre-calculated arctan angle values. The average power consumption is 76 mW with 50 MHz clock and 5 V power supply. The fabricated modulator consumes 24 mW at 61.44 MHz sampling rate and 5 V power supply. |
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ISSN: | 1548-3746 1558-3899 |
DOI: | 10.1109/MWSCAS.2007.4488797 |