Pipelining high-radix SRT division algorithms

Pipelining high-radix SRT division algorithms

This paper shows various ways to pipeline popular SRT division algorithms. Different logic gate families and circuit structures are used to explore possible overheads introduced in each implementation. Simulation results are compared to find out the fastest possible architecture and comparisons are...

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Bibliographische Detailangaben
Hauptverfasser: Upadhyay, S., Stine, J.E.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Algorithm design and analysis
Ambient intelligence
CMOS logic circuits
CMOS technology
Computational modeling
Hardware
Latches
Logic circuits
Logic gates
Pipeline processing
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Beschreibung
Zusammenfassung:This paper shows various ways to pipeline popular SRT division algorithms. Different logic gate families and circuit structures are used to explore possible overheads introduced in each implementation. Simulation results are compared to find out the fastest possible architecture and comparisons are explored from parasitically extracted AMI C5N 0.5 mum layouts.
ISSN:1548-3746
1558-3899
DOI:10.1109/MWSCAS.2007.4488595