Anodic Ta2O5 for CMOS compatible low voltage electrowetting-on-dielectric device fabrication

This paper reports a CMOS compatible fabrication procedure that enables ElecroWetting On Dielectric (EWOD) technology to be post-processed on foundry technology. With driving voltages less than 15 V it is believed to be the lowest reported driving voltage for any material system compatible with post-processing on integrated circuits. The process architecture uses anodically grown tantalum pentoxide as the pinhole free high dielectric constant insulator with the overlying 16 nm layer of Teflon-AF reg , which provides the hydrophobic surface upon which droplets can be manipulated. This stack provides a very robust dielectric, which maintains a sufficiently high capacitance per unit area for effective operation at the lower voltage favoured by more standard CMOS technology. The paper demonstrates that the sputtered tantalum layer can be integrated with the aluminium (or copper) interconnect of foundry CMOS processes by standard microfabrication techniques.