Efficiency of low-power design techniques in Multi-Gate FET CMOS Circuits

Efficiency of low-power design techniques in Multi-Gate FET CMOS Circuits

Energy dissipation, performance, and voltage scaling of Multi-Gate FET (MuGFET) based CMOS circuits are analyzed using product-representative test circuits composed of 10 k devices. The circuits are fabricated in a low power MuGFET CMOS technology, achieve clock frequencies of 370-500MHz at V DD =1....

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Hauptverfasser: Pacha, C., von Arnim, K., Bauer, F., Schulz, T., Xiong, W., San, K.T., Marshall, A., Baumann, T., Cleavelin, C.-R., Schruefer, K., Berthold, J.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Circuit analysis
Circuit testing
Clocks
CMOS technology
Energy dissipation
FETs
Frequency
Performance analysis
Scalability
Voltage
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Beschreibung
Zusammenfassung:Energy dissipation, performance, and voltage scaling of Multi-Gate FET (MuGFET) based CMOS circuits are analyzed using product-representative test circuits composed of 10 k devices. The circuits are fabricated in a low power MuGFET CMOS technology, achieve clock frequencies of 370-500MHz at V DD =1.2V, and operate down to the subthreshold region. Voltage scalability of MuGFET circuits is superior to sub-100 nm planar CMOS circuits due to excellent short-channel effect control.
ISSN:1930-8833
2643-1319
DOI:10.1109/ESSCIRC.2007.4430258