A Novel Double-Sampling Sigma-Delta Modulator Architecture for Broadband Applications

In this paper, a novel single-loop high-order multi-bit sigma-delta modulator (SDM) architecture is proposed for broadband applications. This architecture employs the technique of double-sampling to double the sampling frequency of the SDM without increasing the clock frequency. To reduce the noise...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Xiao Yang, Guican Chen, Jun Cheng, Hong Zhang
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:In this paper, a novel single-loop high-order multi-bit sigma-delta modulator (SDM) architecture is proposed for broadband applications. This architecture employs the technique of double-sampling to double the sampling frequency of the SDM without increasing the clock frequency. To reduce the noise folded into the signal band in a double-sampling SDM, an additional zero is placed at the half of the sampling frequency (fs/2) of the modulator's noise transfer function (NTF). A new simple circuit to realize the zero at f s /2 is proposed. Compared with architectures presented in other papers, the proposed SDM architecture has enough flexibility to implement the optimized NTF of the modulator. Furthermore, to relax the requirements of opamp, a unity-gain signal transfer function (STF) is used.
ISSN:2162-7541
2162-755X
DOI:10.1109/ICASIC.2007.4415622