Block RAM versus distributed RAM implementation of SVM Classifier on FPGA

Block RAM versus distributed RAM implementation of SVM Classifier on FPGA

Support Vector Machines are widely used in pattern recognition, being the newest achievements in neural network structures. This paper presents a Block RAM -based implementation example of an SVM classification function using a Spartan3 FPGA, compared versus a distributed LUT-based RAM one The numbe...

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Bibliographische Detailangaben
Hauptverfasser: Fazakas, A., Neag, M., Festila, L.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Block RAM
Clocks
Field programmable gate arrays
FPGA
Frequency
Image databases
Kernel
LUT-based RAM
Neural networks
Pattern recognition
Support vector machine classification
Support vector machines
SVM
Table lookup
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Beschreibung
Zusammenfassung:Support Vector Machines are widely used in pattern recognition, being the newest achievements in neural network structures. This paper presents a Block RAM -based implementation example of an SVM classification function using a Spartan3 FPGA, compared versus a distributed LUT-based RAM one The number of required clock periods and the maximum clock frequency is calculated and a speed comparison of the implemented system with software running on a PC targeting the same application is also made Keywords: SVM, Block RAM, LUT-based RAM, FPGA.
DOI:10.1109/AE.2006.4382960