A macroblock-level analysis on the dynamic behaviour of an H.264 decoder

This work targets the optimization of multiprocessor H.264 decoder implementations. We have extended the simulator of a multi-core VLIW media processor to enable cycle-accurate function profiling on a sub-macroblock level, which allows measuring the effects of coding modes on the computational compl...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Seitner, F.H., Schreier, R.M., Bleyer, M., Gelautz, M.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Automatic voltage control Computational complexity Computational modeling Decoding Delay Displays dynamic behaviour Entropy H.264 decoder Image reconstruction Load management multi-processor implementation VLIW
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