Research on the PWM Waveform Compensation Algorism

In this paper, dynamic PWM waveform compensation algorithm is introduced in detail. The PWM waveform is generated with FPGA (field programmable gate array). The hardware is based on the Altera's FPGA-Cyclone-II EP2C8 and its configuration device-EPC2LC20. The software is developed under the Altera's development environment qartusII 6.0 and NIOS II CPU in FPGA. In this paper,PID algorithm is adopted. Simulation and experiments validate the system. The THD of the output voltage drops from 2.0% to 5%o . During the adding and removal of the load, the rate of output signal fluctuation is less than 0.5% and the adjusted time is less than 2 ms.high-power supply,