Self Aligned Trap-Shallow Trench Isolation Scheme for the Reliability of TANOS (TaN/AlO/SiN/Oxide/Si) NAND Flash Memory

Self Aligned Trap-Shallow Trench Isolation Scheme for the Reliability of TANOS (TaN/AlO/SiN/Oxide/Si) NAND Flash Memory

In the proposed new scheme, which is named self aligned trap-shallow trench isolation (SAT-STI), such process damage on high-k layer can be minimized, achieving the goal of isolating the storage nitride layer successfully.

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Bibliographische Detailangaben
Hauptverfasser: Jae Sung Sim, Jintaek Park, Changseok Kang, Wonseok Jung, Yoocheol Shin, Juhyung Kim, Jongsun Sel, Changhyun Lee, Sanghun Jeon, Younseok Jeong, Youngwoo Park, Jungdal Choi, Won-Seong Lee
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Aluminum oxide
Dielectrics
Electrodes
Electron traps
Electronic mail
Etching
Material storage
Research and development
Semiconductor device reliability
Silicon compounds
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Beschreibung
Zusammenfassung:In the proposed new scheme, which is named self aligned trap-shallow trench isolation (SAT-STI), such process damage on high-k layer can be minimized, achieving the goal of isolating the storage nitride layer successfully.
ISSN:2159-483X
DOI:10.1109/NVSMW.2007.4290602