Power Analysis Resistant SRAM

The power consumption of a standard CMOS SRAM during read/write operations is dependent on the address applied, the data accessed, and the type of access (read/write). The power analysis resistant SRAM structure presented in this work reduces the dependency of power consumption on data and address 1...

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Bibliographische Detailangaben
Hauptverfasser: Konur, E., Ozelci, Y., Arikan, E., Eksi, U.
Format: Tagungsbericht
Sprache:eng
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