A Sub-1V Low Power Temperature Compensated Current Reference
The design of an all-MOS low-power low-voltage temperature compensated current reference is described. Design equations take into account current as the main variable and it is based on the concept of inversion level. The proposed circuit can be adjusted to behave as PTAT or ZTAT. The circuit has be...
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Format: | Tagungsbericht |
Sprache: | eng |
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Zusammenfassung: | The design of an all-MOS low-power low-voltage temperature compensated current reference is described. Design equations take into account current as the main variable and it is based on the concept of inversion level. The proposed circuit can be adjusted to behave as PTAT or ZTAT. The circuit has been integrated in a 0.25μm standard CMOS process and occupies an area of 0.018mm 2 . The current reference has been also simulated in a 90nm CMOS technology. Lowest voltage operation reported is 1.2V in 0.25μm and 0.9V in 90nm processes. In both technologies the temperature variation is within ±5% from -40°C to 150°C. Simulation results indicate that to generate a 500pA current the circuit would dissipate 10nW at 1V supply voltage. |
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ISSN: | 0271-4302 2158-1525 |
DOI: | 10.1109/ISCAS.2007.378602 |