A 512kB Embedded Phase Change Memory with 416kB/s Write Throughput at 100μA Cell Write Current

An experimental 512kB embedded PCM uses a current-saving architecture in a 0.13μm 1.5V CMOS. The write scheme features a low-write-current resistive device and achieves 416kB/s write-throughput at 100muA cell current. A charge-transfer direct-sense scheme has a 16b parallel read access time of 9.9ns...

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Hauptverfasser: Hanzawa, Satoru, Kitai, Naoki, Osada, Kenichi, Kotabe, Akira, Matsui, Yuichi, Matsuzaki, Nozomu, Takaura, Norikatsu, Moniwa, Masahiro, Kawahara, Takayuki
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:An experimental 512kB embedded PCM uses a current-saving architecture in a 0.13μm 1.5V CMOS. The write scheme features a low-write-current resistive device and achieves 416kB/s write-throughput at 100muA cell current. A charge-transfer direct-sense scheme has a 16b parallel read access time of 9.9ns in an array drawing 280μA. A standby voltage scheme suppresses leakage current in the cell current path and increases the measured PCM cell resistance from 3 to 33MΩ.
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2007.373500