A 45nm Low-Standby-Power Embedded SRAM with Improved Immunity Against Process and Temperature Variations

A 512kb SRAM module is implemented in a 45nm low-standby-power CMOS with variation-tolerant assist circuits against process and temperature. A passive resistance is introduced to the read assist circuit and a divided V DD line is adopted in the memory array to assist the write. Two SRAM cells with a...

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Hauptverfasser:	Yabuuchi, Makoto, Nii, Koji, Tsukamoto, Yasumasa, Ohbayashi, Shigeki, Imaoka, Susumu, Makino, Hiroshi, Yamagami, Yoshinobu, Ishikura, Satoshi, Terano, Toshio, Oashi, Toshiyuki, Hashimoto, Keiji, Sebe, Akio, Okazaki, Gen, Satomi, Katsuji, Akamatsu, Hironori, Shinohara, Hirofumi
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Circuit simulation CMOS technology Decoding Degradation Driver circuits MOS devices Random access memory Rats Temperature dependence Voltage
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