A 45nm Low-Standby-Power Embedded SRAM with Improved Immunity Against Process and Temperature Variations
A 512kb SRAM module is implemented in a 45nm low-standby-power CMOS with variation-tolerant assist circuits against process and temperature. A passive resistance is introduced to the read assist circuit and a divided V DD line is adopted in the memory array to assist the write. Two SRAM cells with a...
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| creator | Yabuuchi, Makoto Nii, Koji Tsukamoto, Yasumasa Ohbayashi, Shigeki Imaoka, Susumu Makino, Hiroshi Yamagami, Yoshinobu Ishikura, Satoshi Terano, Toshio Oashi, Toshiyuki Hashimoto, Keiji Sebe, Akio Okazaki, Gen Satomi, Katsuji Akamatsu, Hironori Shinohara, Hirofumi |
| description | A 512kb SRAM module is implemented in a 45nm low-standby-power CMOS with variation-tolerant assist circuits against process and temperature. A passive resistance is introduced to the read assist circuit and a divided V DD line is adopted in the memory array to assist the write. Two SRAM cells with areas of 0.245mum 2 and 0.327mum 2 are fabricated. Measurements show that the SNM exceeds 120mV and the write margin improves by 15% in the worst PVT condition. |
| doi_str_mv | 10.1109/ISSCC.2007.373426 |
| format | Conference Proceeding |
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Digest of Technical Papers</btitle><stitle>ISSCC</stitle><date>2007-02</date><risdate>2007</risdate><spage>326</spage><epage>606</epage><pages>326-606</pages><issn>0193-6530</issn><eissn>2376-8606</eissn><isbn>1424408520</isbn><isbn>9781424408528</isbn><eisbn>9781424408535</eisbn><eisbn>1424408539</eisbn><abstract>A 512kb SRAM module is implemented in a 45nm low-standby-power CMOS with variation-tolerant assist circuits against process and temperature. A passive resistance is introduced to the read assist circuit and a divided V DD line is adopted in the memory array to assist the write. Two SRAM cells with areas of 0.245mum 2 and 0.327mum 2 are fabricated. Measurements show that the SNM exceeds 120mV and the write margin improves by 15% in the worst PVT condition.</abstract><pub>IEEE</pub><doi>10.1109/ISSCC.2007.373426</doi><tpages>281</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 0193-6530 |
| ispartof | 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 2007, p.326-606 |
| issn | 0193-6530 2376-8606 |
| language | eng |
| recordid | cdi_ieee_primary_4242397 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Circuit simulation CMOS technology Decoding Degradation Driver circuits MOS devices Random access memory Rats Temperature dependence Voltage |
| title | A 45nm Low-Standby-Power Embedded SRAM with Improved Immunity Against Process and Temperature Variations |
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