Comparison of Split-Versus Connected-Core Supplies in the POWER6 Microprocessor

Comparison of Split-Versus Connected-Core Supplies in the POWER6 Microprocessor

The POWER6trade is a dual-core microprocessor fabricated in a 65nm SOI process with 10 levels of low-k copper interconnects. Chips with split- and connected-core power supplies are fabricated, modeled, and tested, showing both the advantages and disadvantages of each. On-chip noise measurements are...

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Bibliographische Detailangaben
Hauptverfasser: James, Norman, Restle, Phillip, Friedrich, Joshua, Huott, Bill, McCredie, Bradley
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Clocks
Delay
Latches
Microprocessors
Noise figure
Noise measurement
Power grids
Power supplies
Storms
Timing
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Beschreibung
Zusammenfassung:The POWER6trade is a dual-core microprocessor fabricated in a 65nm SOI process with 10 levels of low-k copper interconnects. Chips with split- and connected-core power supplies are fabricated, modeled, and tested, showing both the advantages and disadvantages of each. On-chip noise measurements are compared to simulation. The noise measurements and simulation both show that the shorted core power grid design has less noise and a higher maximum frequency.
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2007.373412