A 1.2V 5.2mW 40dB 2.5Gb/s Limiting Amplifier in 0.18μm CMOS Using Negative-Impedance Compensation

A 1.2V 5.2mW 40dB 2.5Gb/s Limiting Amplifier in 0.18μm CMOS Using Negative-Impedance Compensation

A 2.5Gb/s limiting amplifier is realized in a standard 0.18μm CMOS process, exploiting the negative-impedance compensation technique. Measurements show 2.5Gb/s operation (0.5pF ESD protection diodes included) with 40dB gain, 21ps rms jitter for 2 31 -1 PRBS, 9.5mV pp input sensitivity with BER

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Bibliographische Detailangaben
Hauptverfasser: Yoo, Kwisung, Lee, Dongmyung, Han, Gunhee, Park, Sung Min, Oh, Won Seok
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Active inductors
Bandwidth
Circuits
CMOS technology
High speed optical techniques
Optical amplifiers
Optical receivers
Optical sensors
Semiconductor optical amplifiers
Voltage
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Beschreibung
Zusammenfassung:A 2.5Gb/s limiting amplifier is realized in a standard 0.18μm CMOS process, exploiting the negative-impedance compensation technique. Measurements show 2.5Gb/s operation (0.5pF ESD protection diodes included) with 40dB gain, 21ps rms jitter for 2 31 -1 PRBS, 9.5mV pp input sensitivity with BER
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2007.373585