Correlating Wafer-Level TDDB Lifetime Projections to HTOL Gate-Oxide Failures

The power-law model provides a relatively good correlation between the wafer-level (WL) time-dependent dielectric breakdown (TDDB) test (highly accelerated) conducted on test structures and high-temperature operating life (HTOL) test (moderately accelerated) conducted on product. This is true when W...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Akram Ditali, Le, H.A., Butler, D.L., Ingram, M., Ma, M.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Acceleration Circuit testing Extrapolation Leakage current Life estimation Life testing Performance evaluation Stress Temperature sensors Voltage
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!