Drain Extended NMOS High Current Behavior and ESD Protection Strategy for HV Applications in Sub-100nm CMOS Technologies

Drain Extended NMOS High Current Behavior and ESD Protection Strategy for HV Applications in Sub-100nm CMOS Technologies

In this work the high current behavior of drain-extended nMOS transistors (DEnMOS) built in a state-of-the-art 65nm CMOS technology were investigated. It shown that a sufficient level of ESD robustness (I T2 ~2mA/mum) can be achieved through substrate biasing. The concept will be exploited to build...

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Bibliographische Detailangaben
Hauptverfasser: Boselli, G., Vassilev, V., Duvvury, C.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
CMOS technology
DEnMOS
Diodes
Electrostatic discharge
ESD
Implants
MOS devices
MOSFETs
Protection
Robustness
state-of-art CMOS technology
Thyristors
USB2.0
Voltage
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Beschreibung
Zusammenfassung:In this work the high current behavior of drain-extended nMOS transistors (DEnMOS) built in a state-of-the-art 65nm CMOS technology were investigated. It shown that a sufficient level of ESD robustness (I T2 ~2mA/mum) can be achieved through substrate biasing. The concept will be exploited to build robust ESD protections
ISSN:1541-7026
1938-1891
DOI:10.1109/RELPHY.2007.369913