An Efficient Polynomial Multiplier in GF(2m) and its Application to ECC Designs
This paper discusses approaches that allow constructing efficient polynomial multiplication units. Such multipliers are the most important components of ECC hardware accelerators. The proposed hRAIK multiplication improves energy consumption, the longest path, and required silicon area compared to s...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Tagungsbericht |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 6 |
|---|---|
| container_issue | |
| container_start_page | 1 |
| container_title | |
| container_volume | |
| creator | Peter, Steffen Langendorfer, Peter |
| description | This paper discusses approaches that allow constructing efficient polynomial multiplication units. Such multipliers are the most important components of ECC hardware accelerators. The proposed hRAIK multiplication improves energy consumption, the longest path, and required silicon area compared to state of the art approaches. The authors use such a core multiplier to construct an efficient sequential polynomial multiplier based on the known iterative Karatsuba method. Finally, the authors exploit the beneficial properties of the design to build an ECC accelerator. The design for GF(2 233 ) requires about 1.4 mm 2 cell area in a 0.25mum technology and needs 80 musec for an EC point multiplication |
| doi_str_mv | 10.1109/DATE.2007.364469 |
| format | Conference Proceeding |
| fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_4211979</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>4211979</ieee_id><sourcerecordid>4211979</sourcerecordid><originalsourceid>FETCH-LOGICAL-i90t-93e13be5604a954a9eb6a84eb087967d2b18b507ebe760b385173f11335ee5cd3</originalsourceid><addsrcrecordid>eNotzD1PwzAUhWGLD4m2sCOxeIQh4V47ju0xStOCVFSG7JXd3iCj1ImSMPTf0wqGo3d4pMPYI0KKCPZ1WdRVKgB0KvMsy-0Vm6FSJjkjXrO5tAbBAApxcwEJCSqLd2w-jt8AoKSwM7YtIq-aJuwDxYl_du0pdsfgWv7x006hbwMNPES-Xj2L4wt38cDDNPKiP8veTaGLfOp4VZZ8SWP4iuM9u21cO9LDfxesXlV1-ZZstuv3stgkwcKUWEkoPakcMmfVeeRzZzLyYLTN9UF4NF6BJk86By-NQi0bRCkVkdof5II9_d0GItr1Qzi64bTLBKLVVv4CnB1Ngw</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>An Efficient Polynomial Multiplier in GF(2m) and its Application to ECC Designs</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Peter, Steffen ; Langendorfer, Peter</creator><creatorcontrib>Peter, Steffen ; Langendorfer, Peter</creatorcontrib><description>This paper discusses approaches that allow constructing efficient polynomial multiplication units. Such multipliers are the most important components of ECC hardware accelerators. The proposed hRAIK multiplication improves energy consumption, the longest path, and required silicon area compared to state of the art approaches. The authors use such a core multiplier to construct an efficient sequential polynomial multiplier based on the known iterative Karatsuba method. Finally, the authors exploit the beneficial properties of the design to build an ECC accelerator. The design for GF(2 233 ) requires about 1.4 mm 2 cell area in a 0.25mum technology and needs 80 musec for an EC point multiplication</description><identifier>ISSN: 1530-1591</identifier><identifier>ISBN: 3981080122</identifier><identifier>ISBN: 9783981080124</identifier><identifier>EISSN: 1558-1101</identifier><identifier>DOI: 10.1109/DATE.2007.364469</identifier><language>eng</language><publisher>IEEE</publisher><subject>Coprocessors ; Elliptic curve cryptography ; Elliptic curves ; Energy consumption ; Error correction codes ; Hardware ; Iterative methods ; Polynomials ; Public key cryptography ; Silicon</subject><ispartof>2007 Design, Automation & Test in Europe Conference & Exhibition, 2007, p.1-6</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4211979$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,27902,54895</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4211979$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Peter, Steffen</creatorcontrib><creatorcontrib>Langendorfer, Peter</creatorcontrib><title>An Efficient Polynomial Multiplier in GF(2m) and its Application to ECC Designs</title><title>2007 Design, Automation & Test in Europe Conference & Exhibition</title><addtitle>DATE</addtitle><description>This paper discusses approaches that allow constructing efficient polynomial multiplication units. Such multipliers are the most important components of ECC hardware accelerators. The proposed hRAIK multiplication improves energy consumption, the longest path, and required silicon area compared to state of the art approaches. The authors use such a core multiplier to construct an efficient sequential polynomial multiplier based on the known iterative Karatsuba method. Finally, the authors exploit the beneficial properties of the design to build an ECC accelerator. The design for GF(2 233 ) requires about 1.4 mm 2 cell area in a 0.25mum technology and needs 80 musec for an EC point multiplication</description><subject>Coprocessors</subject><subject>Elliptic curve cryptography</subject><subject>Elliptic curves</subject><subject>Energy consumption</subject><subject>Error correction codes</subject><subject>Hardware</subject><subject>Iterative methods</subject><subject>Polynomials</subject><subject>Public key cryptography</subject><subject>Silicon</subject><issn>1530-1591</issn><issn>1558-1101</issn><isbn>3981080122</isbn><isbn>9783981080124</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2007</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotzD1PwzAUhWGLD4m2sCOxeIQh4V47ju0xStOCVFSG7JXd3iCj1ImSMPTf0wqGo3d4pMPYI0KKCPZ1WdRVKgB0KvMsy-0Vm6FSJjkjXrO5tAbBAApxcwEJCSqLd2w-jt8AoKSwM7YtIq-aJuwDxYl_du0pdsfgWv7x006hbwMNPES-Xj2L4wt38cDDNPKiP8veTaGLfOp4VZZ8SWP4iuM9u21cO9LDfxesXlV1-ZZstuv3stgkwcKUWEkoPakcMmfVeeRzZzLyYLTN9UF4NF6BJk86By-NQi0bRCkVkdof5II9_d0GItr1Qzi64bTLBKLVVv4CnB1Ngw</recordid><startdate>200704</startdate><enddate>200704</enddate><creator>Peter, Steffen</creator><creator>Langendorfer, Peter</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200704</creationdate><title>An Efficient Polynomial Multiplier in GF(2m) and its Application to ECC Designs</title><author>Peter, Steffen ; Langendorfer, Peter</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-93e13be5604a954a9eb6a84eb087967d2b18b507ebe760b385173f11335ee5cd3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2007</creationdate><topic>Coprocessors</topic><topic>Elliptic curve cryptography</topic><topic>Elliptic curves</topic><topic>Energy consumption</topic><topic>Error correction codes</topic><topic>Hardware</topic><topic>Iterative methods</topic><topic>Polynomials</topic><topic>Public key cryptography</topic><topic>Silicon</topic><toplevel>online_resources</toplevel><creatorcontrib>Peter, Steffen</creatorcontrib><creatorcontrib>Langendorfer, Peter</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Peter, Steffen</au><au>Langendorfer, Peter</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>An Efficient Polynomial Multiplier in GF(2m) and its Application to ECC Designs</atitle><btitle>2007 Design, Automation & Test in Europe Conference & Exhibition</btitle><stitle>DATE</stitle><date>2007-04</date><risdate>2007</risdate><spage>1</spage><epage>6</epage><pages>1-6</pages><issn>1530-1591</issn><eissn>1558-1101</eissn><isbn>3981080122</isbn><isbn>9783981080124</isbn><abstract>This paper discusses approaches that allow constructing efficient polynomial multiplication units. Such multipliers are the most important components of ECC hardware accelerators. The proposed hRAIK multiplication improves energy consumption, the longest path, and required silicon area compared to state of the art approaches. The authors use such a core multiplier to construct an efficient sequential polynomial multiplier based on the known iterative Karatsuba method. Finally, the authors exploit the beneficial properties of the design to build an ECC accelerator. The design for GF(2 233 ) requires about 1.4 mm 2 cell area in a 0.25mum technology and needs 80 musec for an EC point multiplication</abstract><pub>IEEE</pub><doi>10.1109/DATE.2007.364469</doi><tpages>6</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 1530-1591 |
| ispartof | 2007 Design, Automation & Test in Europe Conference & Exhibition, 2007, p.1-6 |
| issn | 1530-1591 1558-1101 |
| language | eng |
| recordid | cdi_ieee_primary_4211979 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Coprocessors Elliptic curve cryptography Elliptic curves Energy consumption Error correction codes Hardware Iterative methods Polynomials Public key cryptography Silicon |
| title | An Efficient Polynomial Multiplier in GF(2m) and its Application to ECC Designs |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-09T15%3A00%3A53IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=An%20Efficient%20Polynomial%20Multiplier%20in%20GF(2m)%20and%20its%20Application%20to%20ECC%20Designs&rft.btitle=2007%20Design,%20Automation%20&%20Test%20in%20Europe%20Conference%20&%20Exhibition&rft.au=Peter,%20Steffen&rft.date=2007-04&rft.spage=1&rft.epage=6&rft.pages=1-6&rft.issn=1530-1591&rft.eissn=1558-1101&rft.isbn=3981080122&rft.isbn_list=9783981080124&rft_id=info:doi/10.1109/DATE.2007.364469&rft_dat=%3Cieee_6IE%3E4211979%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=4211979&rfr_iscdi=true |