A New Capacitorless 1T DRAM Cell: Surrounding Gate MOSFET With Vertical Channel (SGVC Cell)

A New Capacitorless 1T DRAM Cell: Surrounding Gate MOSFET With Vertical Channel (SGVC Cell)

We propose a surrounding gate MOSFET with vertical channel (SGVC cell) as a 1T DRAM cell. To confirm the memory operation of the SGVC cell, we simulated its memory effect and fabricated the highly scalable SGVC cell. According to simulation and measurement results, the SGVC cell can operate as a 1T...

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Veröffentlicht in:IEEE transactions on nanotechnology 2007-05, Vol.6 (3), p.352-357
Hauptverfasser: JEONG, Hoon, SONG, Ki-Whan, JONG DUK LEE, PARK, Byung-Gook, IL HAN PARK, KIM, Tae-Hun, YEUN SEUNG LEE, KIM, Seong-Goo, JUN SEO, CHO, Kyoungyong, LEE, Kangyoon, SHIN, Hyungcheol
Format: Artikel
Sprache:eng
Schlagworte:
1T DRAM cell
Applied sciences
Arrays
Capacitors
Channels
Costs
Current measurement
Design. Technologies. Operation analysis. Testing
Detection
Dynamic random access memory
Electronics
Exact sciences and technology
Gates
Impact ionization
Integrated circuits
Integrated circuits by function (including memories and processors)
Memory effect
MOSFET circuits
MOSFETs
Nanotechnology
Random access memory
Research and development
Scalability
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
sensing margin
Silicon
Simulation
Substrates
surrounding gate
Transistors
vertical channel
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Zusammenfassung:We propose a surrounding gate MOSFET with vertical channel (SGVC cell) as a 1T DRAM cell. To confirm the memory operation of the SGVC cell, we simulated its memory effect and fabricated the highly scalable SGVC cell. According to simulation and measurement results, the SGVC cell can operate as a 1T DRAM having a sufficiently large sensing margin. Also, due to its vertical channel structure and common source architecture, it can readily be made into a 4F 2 cell array
ISSN:1536-125X
1941-0085
DOI:10.1109/TNANO.2007.893575