An Improved Digital Timing Recovery Circuit for Burst-Mode Communications
Burst-mode communication (or burst-mode transmission) has been increasingly adopted in modern wireless communication systems. It requires a digital timing recovery circuit with short acquisition time. The bang-bang phase detector is widely used in digital timing recovery circuits owing to its simple...
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creator | Changqing Liu Xingbo Guo Jian Song Chanyong Pan Zhixing Yang |
description | Burst-mode communication (or burst-mode transmission) has been increasingly adopted in modern wireless communication systems. It requires a digital timing recovery circuit with short acquisition time. The bang-bang phase detector is widely used in digital timing recovery circuits owing to its simple structure. However, these timing recovery circuits do not provide a quick acquisition. In this paper, an enhanced bang-bang phase detector is proposed, increasing the resolution of the timing error by over-sampling the data L times and therefore reducing the phase error variance by 1/L 2 times. This timing recovery scheme can be implemented using a direct digital synchronizer (DDS). Both simulation and experimental results illustrate that the new scheme has a shorter acquisition time and a longer holding time, satisfying the need of burst-mode communications |
doi_str_mv | 10.1109/WiCOM.2006.168 |
format | Conference Proceeding |
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It requires a digital timing recovery circuit with short acquisition time. The bang-bang phase detector is widely used in digital timing recovery circuits owing to its simple structure. However, these timing recovery circuits do not provide a quick acquisition. In this paper, an enhanced bang-bang phase detector is proposed, increasing the resolution of the timing error by over-sampling the data L times and therefore reducing the phase error variance by 1/L 2 times. This timing recovery scheme can be implemented using a direct digital synchronizer (DDS). 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Both simulation and experimental results illustrate that the new scheme has a shorter acquisition time and a longer holding time, satisfying the need of burst-mode communications</description><subject>Circuits</subject><subject>Clocks</subject><subject>Detectors</subject><subject>Jitter</subject><subject>Optical receivers</subject><subject>Phase detection</subject><subject>Phase shifters</subject><subject>Quantization</subject><subject>Sampling methods</subject><subject>Timing</subject><issn>2161-9646</issn><isbn>1424405173</isbn><isbn>9781424405176</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2006</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj8tKw0AUQAdUsNZu3biZH0icO8_MssZXoKUgAZdlktyUK01SJonQv7egqwNnceAw9gAiBRD-6Yvy3TaVQtgUbHbF7kBLrYUBp67ZQoKFxFttb9lqHL-FEAqcc1m2YMW650V3isMPNvyFDjSFIy-po_7AP7G-6HjmOcV6pom3Q-TPcxynZDs0yPOh6-ae6jDR0I_37KYNxxFX_1yy8u21zD-Sze69yNebhLyYktpjZXRQyorGoEft6iZIUJC1mZCNd9JYC9Y6BDCNb0FiJUJotUJ52ajUkj3-ZQkR96dIXYjnvQbtlTbqF-_CS4s</recordid><startdate>200609</startdate><enddate>200609</enddate><creator>Changqing Liu</creator><creator>Xingbo Guo</creator><creator>Jian Song</creator><creator>Chanyong Pan</creator><creator>Zhixing Yang</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200609</creationdate><title>An Improved Digital Timing Recovery Circuit for Burst-Mode Communications</title><author>Changqing Liu ; Xingbo Guo ; Jian Song ; Chanyong Pan ; Zhixing Yang</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-c9eb54a3360d5e9e47cda21318f802d9725661667e115d9f12eb0aaf43e2216b3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2006</creationdate><topic>Circuits</topic><topic>Clocks</topic><topic>Detectors</topic><topic>Jitter</topic><topic>Optical receivers</topic><topic>Phase detection</topic><topic>Phase shifters</topic><topic>Quantization</topic><topic>Sampling methods</topic><topic>Timing</topic><toplevel>online_resources</toplevel><creatorcontrib>Changqing Liu</creatorcontrib><creatorcontrib>Xingbo Guo</creatorcontrib><creatorcontrib>Jian Song</creatorcontrib><creatorcontrib>Chanyong Pan</creatorcontrib><creatorcontrib>Zhixing Yang</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Changqing Liu</au><au>Xingbo Guo</au><au>Jian Song</au><au>Chanyong Pan</au><au>Zhixing Yang</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>An Improved Digital Timing Recovery Circuit for Burst-Mode Communications</atitle><btitle>2006 International Conference on Wireless Communications, Networking and Mobile Computing</btitle><stitle>WICOM</stitle><date>2006-09</date><risdate>2006</risdate><spage>1</spage><epage>5</epage><pages>1-5</pages><issn>2161-9646</issn><isbn>1424405173</isbn><isbn>9781424405176</isbn><abstract>Burst-mode communication (or burst-mode transmission) has been increasingly adopted in modern wireless communication systems. It requires a digital timing recovery circuit with short acquisition time. The bang-bang phase detector is widely used in digital timing recovery circuits owing to its simple structure. However, these timing recovery circuits do not provide a quick acquisition. In this paper, an enhanced bang-bang phase detector is proposed, increasing the resolution of the timing error by over-sampling the data L times and therefore reducing the phase error variance by 1/L 2 times. This timing recovery scheme can be implemented using a direct digital synchronizer (DDS). Both simulation and experimental results illustrate that the new scheme has a shorter acquisition time and a longer holding time, satisfying the need of burst-mode communications</abstract><pub>IEEE</pub><doi>10.1109/WiCOM.2006.168</doi><tpages>5</tpages></addata></record> |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Circuits Clocks Detectors Jitter Optical receivers Phase detection Phase shifters Quantization Sampling methods Timing |
title | An Improved Digital Timing Recovery Circuit for Burst-Mode Communications |
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