An Improved Digital Timing Recovery Circuit for Burst-Mode Communications

Burst-mode communication (or burst-mode transmission) has been increasingly adopted in modern wireless communication systems. It requires a digital timing recovery circuit with short acquisition time. The bang-bang phase detector is widely used in digital timing recovery circuits owing to its simple structure. However, these timing recovery circuits do not provide a quick acquisition. In this paper, an enhanced bang-bang phase detector is proposed, increasing the resolution of the timing error by over-sampling the data L times and therefore reducing the phase error variance by 1/L 2 times. This timing recovery scheme can be implemented using a direct digital synchronizer (DDS). Both simulation and experimental results illustrate that the new scheme has a shorter acquisition time and a longer holding time, satisfying the need of burst-mode communications