A Wide-Range and High PSRR CMOS Voltage Reference for Implantable Device

This paper presents a design of a high power supply rejection ratio (PSRR) voltage reference used in an implantable device. The coupling ripple noise from the power supply in implantable device can be reduced by a modified design of wide-bandwidth PSRR V GS voltage reference with negative feedback s...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Wen-Yaw Chung, Chiung-Cheng Chuang, Ti-Ting Chen
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:This paper presents a design of a high power supply rejection ratio (PSRR) voltage reference used in an implantable device. The coupling ripple noise from the power supply in implantable device can be reduced by a modified design of wide-bandwidth PSRR V GS voltage reference with negative feedback schemes. The circuit has been verified by using TSMC 0.35mum mixed-signal 2P4M polycide 3.3/5V models. The simulation results show the proposed circuit improves PSRR up to 80dB at 1 MHz and only consumes 23.6muW at 3V power supply. The circuit not only maintains the same performance as the conventional Vgs-reference but also is suitable for high input power supply
DOI:10.1109/APCCAS.2006.342494