Application-Specific RISC Architecture for ITU-T G.729 Decoding Processing

Application-Specific RISC Architecture for ITU-T G.729 Decoding Processing

In this paper, we propose a new application-specific RISC processor architecture to overcome the performance bottleneck of traditional RISC processor executing complex speech decoding application such as, what we mostly concern about, ITU-T G.729 decoder. By introducing the enhanced hardware compone...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Chien-Hsuan Wu, Chin-Yu Huang, Jun-Ru Chang
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Algorithms
Computer architecture
Design methodology
Finite impulse response filter
Hardware design languages
Iterative decoding
Oral communication
Reduced instruction set computing
Speech processing
Speech synthesis
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:In this paper, we propose a new application-specific RISC processor architecture to overcome the performance bottleneck of traditional RISC processor executing complex speech decoding application such as, what we mostly concern about, ITU-T G.729 decoder. By introducing the enhanced hardware components into ARM v4 processor architecture, the new application-specific instructions are accomplished and the performance of this new architecture is about 52% improvement than original ARM v4 processor architecture
ISSN:2159-3442
2159-3450
DOI:10.1109/TENCON.2006.344183